Coverart for item
The Resource Gain-cell embedded DRAMs for low-power VLSI systems-on-chip, Pascal Meinerzhagen, Adam Teman, Robert Giterman, Noa Edri, Andreas Burg, Alexander Fish

Gain-cell embedded DRAMs for low-power VLSI systems-on-chip, Pascal Meinerzhagen, Adam Teman, Robert Giterman, Noa Edri, Andreas Burg, Alexander Fish

Label
Gain-cell embedded DRAMs for low-power VLSI systems-on-chip
Title
Gain-cell embedded DRAMs for low-power VLSI systems-on-chip
Statement of responsibility
Pascal Meinerzhagen, Adam Teman, Robert Giterman, Noa Edri, Andreas Burg, Alexander Fish
Contributor
Author
Subject
Language
eng
Summary
This book pioneers the field of gain-cell embedded DRAM (GC-eDRAM) design for low-power VLSI systems-on-chip (SoCs). Novel GC-eDRAMs are specifically designed and optimized for a range of low-power VLSI SoCs, ranging from ultra-low power to power-aware high-performance applications. After a detailed review of prior-art GC-eDRAMs, an analytical retention time distribution model is introduced and validated by silicon measurements, which is key for low-power GC-eDRAM design. The book then investigates supply voltage scaling and near-threshold voltage (NTV) operation of a conventional gain cell (GC), before presenting novel GC circuit and assist techniques for NTV operation, including a 3-transistor full transmission-gate write port, reverse body biasing (RBB), and a replica technique for optimum refresh timing. Next, conventional GC bitcells are evaluated under aggressive technology and voltage scaling (down to the subthreshold domain), before novel bitcells for aggressively scaled CMOS nodes and soft-error tolerance as presented, including a 4-transistor GC with partial internal feedback and a 4-transistor GC with built-in redundancy
Member of
Cataloging source
YDX
Dewey number
006.2/2
Index
index present
LC call number
TK7895.E42
Literary form
non fiction
Nature of contents
  • dictionaries
  • bibliography
http://library.link/vocab/relatedWorkOrContributorDate
1975-
http://library.link/vocab/relatedWorkOrContributorName
  • Meinerzhagen, Pascal
  • Teman, Adam
  • Giterman, Robert
  • Edri, Noa
  • Burg, Andreas
  • Fish, Alexander
http://library.link/vocab/subjectName
  • Embedded computer systems
  • Systems on a chip
  • Integrated circuits
Label
Gain-cell embedded DRAMs for low-power VLSI systems-on-chip, Pascal Meinerzhagen, Adam Teman, Robert Giterman, Noa Edri, Andreas Burg, Alexander Fish
Instantiates
Publication
Copyright
Bibliography note
Includes bibliographical references and index
Carrier category
online resource
Carrier category code
cr
Carrier MARC source
rdacarrier
Content category
text
Content type code
txt
Content type MARC source
rdacontent
Contents
Motivation -- Introduction to Gain-Cell Based eDRAMs (GC-eDRAMs) -- GC-eDRAMs Operated at Scaled Supply Voltages -- Near-VT GC-eDRAM Implementations with Extended Retention Times -- Aggressive Technology and Voltage Scaling (to Sub-VT Domain) -- Single-Supply 3T Gain-Cell for Low-Voltage Low-Power Applications -- 4T Gain-Cell with Internal-Feedback for Ultra-Low Retention Power at Scaled CMOS Nodes -- Multilevel GC-eDRAM (MLGC-eDRAM) -- Soft Error Tolerant Low Power 4T Gain-Cell Array with Multi-Bit Error Detection and Correction -- Conclusions
Control code
SPR993598164
Dimensions
unknown
Extent
1 online resource.
Form of item
online
Isbn
9783319604022
Media category
computer
Media MARC source
rdamedia
Media type code
c
Other control number
10.1007/978-3-319-60402-2
Specific material designation
remote
System control number
  • ocn993598164
  • (OCoLC)993598164
Label
Gain-cell embedded DRAMs for low-power VLSI systems-on-chip, Pascal Meinerzhagen, Adam Teman, Robert Giterman, Noa Edri, Andreas Burg, Alexander Fish
Publication
Copyright
Bibliography note
Includes bibliographical references and index
Carrier category
online resource
Carrier category code
cr
Carrier MARC source
rdacarrier
Content category
text
Content type code
txt
Content type MARC source
rdacontent
Contents
Motivation -- Introduction to Gain-Cell Based eDRAMs (GC-eDRAMs) -- GC-eDRAMs Operated at Scaled Supply Voltages -- Near-VT GC-eDRAM Implementations with Extended Retention Times -- Aggressive Technology and Voltage Scaling (to Sub-VT Domain) -- Single-Supply 3T Gain-Cell for Low-Voltage Low-Power Applications -- 4T Gain-Cell with Internal-Feedback for Ultra-Low Retention Power at Scaled CMOS Nodes -- Multilevel GC-eDRAM (MLGC-eDRAM) -- Soft Error Tolerant Low Power 4T Gain-Cell Array with Multi-Bit Error Detection and Correction -- Conclusions
Control code
SPR993598164
Dimensions
unknown
Extent
1 online resource.
Form of item
online
Isbn
9783319604022
Media category
computer
Media MARC source
rdamedia
Media type code
c
Other control number
10.1007/978-3-319-60402-2
Specific material designation
remote
System control number
  • ocn993598164
  • (OCoLC)993598164

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