Coverart for item
The Resource Guide to RISC processors : for programmers and engineers, Sivarama P. Dandamudi, (electronic book)

Guide to RISC processors : for programmers and engineers, Sivarama P. Dandamudi, (electronic book)

Label
Guide to RISC processors : for programmers and engineers
Title
Guide to RISC processors
Title remainder
for programmers and engineers
Statement of responsibility
Sivarama P. Dandamudi
Creator
Subject
Language
eng
Summary
Recently, there has been a trend toward processors based on the RISC (Reduced Instruction Set Computer) design. This is an accessible and all-encompassing compendium on RISC processors, introducing five of them: MIPS, SPARC, PowerPC, ARM, and Intel's 64-bit Itanium. Initial chapters explain differences between the CISC and RISC designs, and the core RISC design principles are clearly discussed. Later chapters provide instruction on MIPS assembly language programming, so that readers can readily learn the concepts and principles introduced earlier. Professionals, programmers, and students in computer architecture and programming courses will find the guide an essential resource
Member of
Cataloging source
COO
http://library.link/vocab/creatorDate
1955-
http://library.link/vocab/creatorName
Dandamudi, Sivarama P.
Dewey number
004.3
Illustrations
illustrations
Index
index present
Literary form
non fiction
Nature of contents
  • dictionaries
  • bibliography
http://library.link/vocab/subjectName
  • Reduced instruction set computers
  • Computer architecture
  • Assembly languages (Electronic computers)
  • Microprocessors
Label
Guide to RISC processors : for programmers and engineers, Sivarama P. Dandamudi, (electronic book)
Instantiates
Publication
Bibliography note
Includes bibliographical references (p. 375-377) and index
Carrier category
online resource
Carrier category code
cr
Carrier MARC source
rdacarrier
Content category
text
Content type code
txt
Content type MARC source
rdacontent
Contents
Overview -- Processor Design Issues -- RISC Principles -- Architectures -- MIPS Architecture -- SPARC Architecture -- PowerPC Architecture -- Itanium Architecture -- ARM Architecture -- MIPS Assembly Language -- SPIM Simulator and Debugger -- Assembly Language Overview -- Procedures and the Stack -- Addressing Modes -- Arithmetic Instructions -- Conditional Execution -- Logical and Shift Operations -- Recursion -- Floating-Point Operations
Control code
SPR64201240
Extent
xv, 387 p.
Form of item
online
Isbn
9780387274461
Media category
computer
Media MARC source
rdamedia
Media type code
c
Other physical details
ill.
Specific material designation
remote
Label
Guide to RISC processors : for programmers and engineers, Sivarama P. Dandamudi, (electronic book)
Publication
Bibliography note
Includes bibliographical references (p. 375-377) and index
Carrier category
online resource
Carrier category code
cr
Carrier MARC source
rdacarrier
Content category
text
Content type code
txt
Content type MARC source
rdacontent
Contents
Overview -- Processor Design Issues -- RISC Principles -- Architectures -- MIPS Architecture -- SPARC Architecture -- PowerPC Architecture -- Itanium Architecture -- ARM Architecture -- MIPS Assembly Language -- SPIM Simulator and Debugger -- Assembly Language Overview -- Procedures and the Stack -- Addressing Modes -- Arithmetic Instructions -- Conditional Execution -- Logical and Shift Operations -- Recursion -- Floating-Point Operations
Control code
SPR64201240
Extent
xv, 387 p.
Form of item
online
Isbn
9780387274461
Media category
computer
Media MARC source
rdamedia
Media type code
c
Other physical details
ill.
Specific material designation
remote

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