Coverart for item
The Resource IEEE Symposium on FPGAs for Custom Computing Machines : proceedings, April 19-21, 1995, Napa Valley, California, sponsored by IEEE Computer Society Technical Committee on Computer Architecture ; edited by Peter Athanas and Kenneth L. Pocek

IEEE Symposium on FPGAs for Custom Computing Machines : proceedings, April 19-21, 1995, Napa Valley, California, sponsored by IEEE Computer Society Technical Committee on Computer Architecture ; edited by Peter Athanas and Kenneth L. Pocek

Label
IEEE Symposium on FPGAs for Custom Computing Machines : proceedings, April 19-21, 1995, Napa Valley, California
Title
IEEE Symposium on FPGAs for Custom Computing Machines
Title remainder
proceedings, April 19-21, 1995, Napa Valley, California
Statement of responsibility
sponsored by IEEE Computer Society Technical Committee on Computer Architecture ; edited by Peter Athanas and Kenneth L. Pocek
Title variation
FPGAs for Custom Computing Machines, 1995, proceedings, IEEE Symposium on
Creator
Contributor
Subject
Genre
Language
eng
Member of
Action
digitized
Cataloging source
OCL
Dewey number
004.16
Illustrations
illustrations
Index
index present
LC call number
QA76.5
LC item number
.I2765 1995
Literary form
non fiction
http://bibfra.me/vocab/lite/meetingDate
1995
http://bibfra.me/vocab/lite/meetingName
FCCM (Symposium)
Nature of contents
  • dictionaries
  • bibliography
http://library.link/vocab/relatedWorkOrContributorDate
1960-
http://library.link/vocab/relatedWorkOrContributorName
  • Athanas, Peter
  • Pocek, Kenneth L
  • IEEE Computer Society
http://library.link/vocab/subjectName
Electronic digital computers
Label
IEEE Symposium on FPGAs for Custom Computing Machines : proceedings, April 19-21, 1995, Napa Valley, California, sponsored by IEEE Computer Society Technical Committee on Computer Architecture ; edited by Peter Athanas and Kenneth L. Pocek
Instantiates
Publication
Note
"IEEE catalog number 95TB8077"--Title page verso
Bibliography note
Includes bibliographical references and index
Carrier category
online resource
Carrier category code
cr
Carrier MARC source
rdacarrier
Content category
text
Content type code
txt
Content type MARC source
rdacontent
Contents
  • Common Processor Element Packaging for CHAMP
  • B. Box and J. Nieznanski
  • Enable ++: A Second Generation FPGA Processor
  • H. Hogl, A. Kugel, J. Ludvig, R. Manner, K.H. Noffz and R. Zoz
  • Design and Implementation of a Multicomputer Interconnection Network Using FPGAs
  • C.-C. Yeh, C.-H. Wu and J.-Y. Juang
  • Routability Improvement Using Dynamic Interconnect Architecture
  • J. Li and C.-K. Cheng
  • Reconfigurable Real-Time Signal Transport System Using Custom FPGAs
  • K. Hayashi, T. Miyazaki, K. Shirakawa, K. Yamada and N. Ohta
  • A FCCM for Dataflow (Spreadsheet) Programs
  • A. Lew and R. Halverson
  • MORRPH: A MOdular and Reprogrammable Real-time Processing Hardware
  • T.H. Drayer, W.E. King, J.G. Tront and R.W. Conners
  • Architecture of a FPGA-based Coprocessor: The PAR-1
  • J.M. Carrera, E.J. Martinez, S.A. Fernandez and J.M.M. Chaus
  • Teramac -- Configurable Custom Computing
  • R. Amerson, R.J. Carter, W.B. Culbertson, P. Kuekes and G. Snider
Control code
IEEE47883056
Dimensions
unknown
Extent
1 online resource (viii, 222 pages)
Form of item
online
Isbn
9780780331426
Lccn
94074503
Media category
computer
Media MARC source
rdamedia
Media type code
c
Other physical details
illustrations
Reproduction note
Electronic reproduction.
Sound
unknown sound
Specific material designation
remote
System control number
  • ocm47883056\
  • (OCoLC)47883056
System details
Master and use copy. Digital master created according to Benchmark for Faithful Digital Reproductions of Monographs and Serials, Version 1. Digital Library Federation, December 2002.
Label
IEEE Symposium on FPGAs for Custom Computing Machines : proceedings, April 19-21, 1995, Napa Valley, California, sponsored by IEEE Computer Society Technical Committee on Computer Architecture ; edited by Peter Athanas and Kenneth L. Pocek
Publication
Note
"IEEE catalog number 95TB8077"--Title page verso
Bibliography note
Includes bibliographical references and index
Carrier category
online resource
Carrier category code
cr
Carrier MARC source
rdacarrier
Content category
text
Content type code
txt
Content type MARC source
rdacontent
Contents
  • Common Processor Element Packaging for CHAMP
  • B. Box and J. Nieznanski
  • Enable ++: A Second Generation FPGA Processor
  • H. Hogl, A. Kugel, J. Ludvig, R. Manner, K.H. Noffz and R. Zoz
  • Design and Implementation of a Multicomputer Interconnection Network Using FPGAs
  • C.-C. Yeh, C.-H. Wu and J.-Y. Juang
  • Routability Improvement Using Dynamic Interconnect Architecture
  • J. Li and C.-K. Cheng
  • Reconfigurable Real-Time Signal Transport System Using Custom FPGAs
  • K. Hayashi, T. Miyazaki, K. Shirakawa, K. Yamada and N. Ohta
  • A FCCM for Dataflow (Spreadsheet) Programs
  • A. Lew and R. Halverson
  • MORRPH: A MOdular and Reprogrammable Real-time Processing Hardware
  • T.H. Drayer, W.E. King, J.G. Tront and R.W. Conners
  • Architecture of a FPGA-based Coprocessor: The PAR-1
  • J.M. Carrera, E.J. Martinez, S.A. Fernandez and J.M.M. Chaus
  • Teramac -- Configurable Custom Computing
  • R. Amerson, R.J. Carter, W.B. Culbertson, P. Kuekes and G. Snider
Control code
IEEE47883056
Dimensions
unknown
Extent
1 online resource (viii, 222 pages)
Form of item
online
Isbn
9780780331426
Lccn
94074503
Media category
computer
Media MARC source
rdamedia
Media type code
c
Other physical details
illustrations
Reproduction note
Electronic reproduction.
Sound
unknown sound
Specific material designation
remote
System control number
  • ocm47883056\
  • (OCoLC)47883056
System details
Master and use copy. Digital master created according to Benchmark for Faithful Digital Reproductions of Monographs and Serials, Version 1. Digital Library Federation, December 2002.

Library Locations

Processing Feedback ...