Coverart for item
The Resource Languages and compilers for parallel computing : 18th international workshop, LCPC 2005, Hawthorne, NY, USA, October 20-22, 2005 : revised selected papers, Eduard Ayguadé [and others] (eds.)

Languages and compilers for parallel computing : 18th international workshop, LCPC 2005, Hawthorne, NY, USA, October 20-22, 2005 : revised selected papers, Eduard Ayguadé [and others] (eds.)

Label
Languages and compilers for parallel computing : 18th international workshop, LCPC 2005, Hawthorne, NY, USA, October 20-22, 2005 : revised selected papers
Title
Languages and compilers for parallel computing
Title remainder
18th international workshop, LCPC 2005, Hawthorne, NY, USA, October 20-22, 2005 : revised selected papers
Statement of responsibility
Eduard Ayguadé [and others] (eds.)
Title variation
LCPC 2005
Creator
Contributor
Subject
Genre
Language
eng
Member of
Cataloging source
GW5XE
Dewey number
004/.35
Illustrations
illustrations
Index
index present
LC call number
QA76.58
LC item number
.W575 2005eb
Literary form
non fiction
http://bibfra.me/vocab/lite/meetingDate
2005
http://bibfra.me/vocab/lite/meetingName
LCPC (Workshop)
Nature of contents
  • dictionaries
  • bibliography
http://library.link/vocab/relatedWorkOrContributorName
Ayguadé, Eduard
Series statement
Lecture notes in computer science,
Series volume
4339
http://library.link/vocab/subjectName
  • Parallel processing (Electronic computers)
  • Programming languages (Electronic computers)
  • Compilers (Computer programs)
Label
Languages and compilers for parallel computing : 18th international workshop, LCPC 2005, Hawthorne, NY, USA, October 20-22, 2005 : revised selected papers, Eduard Ayguadé [and others] (eds.)
Instantiates
Publication
Bibliography note
Includes bibliographical references and index
Carrier category
online resource
Carrier category code
cr
Carrier MARC source
rdacarrier
Color
multicolored
Content category
text
Content type code
txt
Content type MARC source
rdacontent
Contents
Revisiting Graph Coloring Register Allocation: A Study of the Chaitin-Briggs and Callahan-Koblenz Algorithms -- Register Pressure in Software-Pipelined Loop Nests: Fast Computation and Impact on Architecture Design -- Manipulating MAXLIVE for Spill-Free Register Allocation -- Optimizing Packet Accesses for a Domain Specific Language on Network Processors -- Array Replication to Increase Parallelism in Applications Mapped to Configurable Architectures -- Generation of Control and Data Flow Graphs from Scheduled and Pipelined Assembly Code -- Applying Data Copy to Improve Memory Performance of General Array Computations -- A Cache-Conscious Profitability Model for Empirical Tuning of Loop Fusion -- Optimizing Matrix Multiplication with a Classifier Learning System -- A Language for the Compact Representation of Multiple Program Versions -- Efficient Computation of May-Happen-in-Parallel Information for Concurrent Java Programs -- Evaluating the Impact of Thread Escape Analysis on a Memory Consistency Model-Aware Compiler -- Concurrency Analysis for Parallel Programs with Textually Aligned Barriers -- Titanium Performance and Potential: An NPB Experimental Study -- Efficient Search-Space Pruning for Integrated Fusion and Tiling Transformations -- Automatic Measurement of Instruction Cache Capacity -- Combined ILP and Register Tiling: Analytical Model and Optimization Framework -- Analytic Models and Empirical Search: A Hybrid Approach to Code Optimization -- Testing Speculative Work in a Lazy/Eager Parallel Functional Language -- Loop Selection for Thread-Level Speculation -- Software Thread Level Speculation for the Java Language and Virtual Machine Environment -- Lightweight Monitoring of the Progress of Remotely Executing Computations -- Using Platform-Specific Performance Counters for Dynamic Compilation -- A Domain-Specific Interpreter for Parallelizing a Large Mixed-Language Visualisation Application -- Compiler Control Power Saving Scheme for Multi Core Processors -- Code Transformations for One-Pass Analysis -- Scalable Array SSA and Array Data Flow Analysis -- Interprocedural Symbolic Range Propagation for Optimizing Compilers -- Parallelization of Utility Programs Based on Behavior Phase Analysis -- A Systematic Approach to Model-Guided Empirical Search for Memory Hierarchy Optimization -- An Efficient Approach for Self-scheduling Parallel Loops on Multiprogrammed Parallel Computers -- Dynamic Compilation for Reducing Energy Consumption of I/O-Intensive Applications -- Supporting SELL for High-Performance Computing -- Compiler Supports and Optimizations for PAC VLIW DSP Processors
Dimensions
unknown
Extent
1 online resource (xi, 476 pages)
Form of item
online
Isbn
9783540693307
Lccn
2006939009
Media category
computer
Media MARC source
rdamedia
Media type code
c
Other control number
10.1007/978-3-540-69330-7
Other physical details
illustrations.
Specific material designation
remote
System control number
  • SPR262693959
  • ocn262693959
Label
Languages and compilers for parallel computing : 18th international workshop, LCPC 2005, Hawthorne, NY, USA, October 20-22, 2005 : revised selected papers, Eduard Ayguadé [and others] (eds.)
Publication
Bibliography note
Includes bibliographical references and index
Carrier category
online resource
Carrier category code
cr
Carrier MARC source
rdacarrier
Color
multicolored
Content category
text
Content type code
txt
Content type MARC source
rdacontent
Contents
Revisiting Graph Coloring Register Allocation: A Study of the Chaitin-Briggs and Callahan-Koblenz Algorithms -- Register Pressure in Software-Pipelined Loop Nests: Fast Computation and Impact on Architecture Design -- Manipulating MAXLIVE for Spill-Free Register Allocation -- Optimizing Packet Accesses for a Domain Specific Language on Network Processors -- Array Replication to Increase Parallelism in Applications Mapped to Configurable Architectures -- Generation of Control and Data Flow Graphs from Scheduled and Pipelined Assembly Code -- Applying Data Copy to Improve Memory Performance of General Array Computations -- A Cache-Conscious Profitability Model for Empirical Tuning of Loop Fusion -- Optimizing Matrix Multiplication with a Classifier Learning System -- A Language for the Compact Representation of Multiple Program Versions -- Efficient Computation of May-Happen-in-Parallel Information for Concurrent Java Programs -- Evaluating the Impact of Thread Escape Analysis on a Memory Consistency Model-Aware Compiler -- Concurrency Analysis for Parallel Programs with Textually Aligned Barriers -- Titanium Performance and Potential: An NPB Experimental Study -- Efficient Search-Space Pruning for Integrated Fusion and Tiling Transformations -- Automatic Measurement of Instruction Cache Capacity -- Combined ILP and Register Tiling: Analytical Model and Optimization Framework -- Analytic Models and Empirical Search: A Hybrid Approach to Code Optimization -- Testing Speculative Work in a Lazy/Eager Parallel Functional Language -- Loop Selection for Thread-Level Speculation -- Software Thread Level Speculation for the Java Language and Virtual Machine Environment -- Lightweight Monitoring of the Progress of Remotely Executing Computations -- Using Platform-Specific Performance Counters for Dynamic Compilation -- A Domain-Specific Interpreter for Parallelizing a Large Mixed-Language Visualisation Application -- Compiler Control Power Saving Scheme for Multi Core Processors -- Code Transformations for One-Pass Analysis -- Scalable Array SSA and Array Data Flow Analysis -- Interprocedural Symbolic Range Propagation for Optimizing Compilers -- Parallelization of Utility Programs Based on Behavior Phase Analysis -- A Systematic Approach to Model-Guided Empirical Search for Memory Hierarchy Optimization -- An Efficient Approach for Self-scheduling Parallel Loops on Multiprogrammed Parallel Computers -- Dynamic Compilation for Reducing Energy Consumption of I/O-Intensive Applications -- Supporting SELL for High-Performance Computing -- Compiler Supports and Optimizations for PAC VLIW DSP Processors
Dimensions
unknown
Extent
1 online resource (xi, 476 pages)
Form of item
online
Isbn
9783540693307
Lccn
2006939009
Media category
computer
Media MARC source
rdamedia
Media type code
c
Other control number
10.1007/978-3-540-69330-7
Other physical details
illustrations.
Specific material designation
remote
System control number
  • SPR262693959
  • ocn262693959

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