The Resource Memory controllers for mixed-time-criticality systems : architectures, methodologies and trade-offs, Sven Goossens, Karthik Chandrasekar, Benny Akesson, Kees Goossens, (electronic book)
Memory controllers for mixed-time-criticality systems : architectures, methodologies and trade-offs, Sven Goossens, Karthik Chandrasekar, Benny Akesson, Kees Goossens, (electronic book)
Resource Information
The item Memory controllers for mixed-time-criticality systems : architectures, methodologies and trade-offs, Sven Goossens, Karthik Chandrasekar, Benny Akesson, Kees Goossens, (electronic book) represents a specific, individual, material embodiment of a distinct intellectual or artistic creation found in University of Liverpool.This item is available to borrow from 1 library branch.
Resource Information
The item Memory controllers for mixed-time-criticality systems : architectures, methodologies and trade-offs, Sven Goossens, Karthik Chandrasekar, Benny Akesson, Kees Goossens, (electronic book) represents a specific, individual, material embodiment of a distinct intellectual or artistic creation found in University of Liverpool.
This item is available to borrow from 1 library branch.
- Summary
- This book discusses the design and performance analysis of SDRAM controllers that cater to both real-time and best-effort applications, i.e. mixed-time-criticality memory controllers. The authors describe the state of the art, and then focus on an architecture template for reconfigurable memory controllers that addresses effectively the quickly evolving set of SDRAM standards, in terms of worst-case timing and power analysis, as well as implementation. A prototype implementation of the controller in SystemC and synthesizable VHDL for an FPGA development board are used as a proof of concept of the architecture template
- Language
- eng
- Extent
- 1 online resource (xxvii, 202 pages)
- Contents
-
- Introduction
- Reconfigurable Real-Time Memory Controller Architecture
- Memory Patterns
- Cycle-Accurate SDRAM Power Modeling
- Power/Performance Trade-Offs
- Conservative Open-Page Policy
- Reconfiguration
- Related Work
- Conclusions and Future Work
- Appendix A: ILP Problem Formation
- Appendix B: Memory Specifications
- Appendix C: Code Listings
- Appendix D: List of Acronyms
- Appendix E: List of Symbols
- Isbn
- 9783319320939
- Label
- Memory controllers for mixed-time-criticality systems : architectures, methodologies and trade-offs
- Title
- Memory controllers for mixed-time-criticality systems
- Title remainder
- architectures, methodologies and trade-offs
- Statement of responsibility
- Sven Goossens, Karthik Chandrasekar, Benny Akesson, Kees Goossens
- Language
- eng
- Summary
- This book discusses the design and performance analysis of SDRAM controllers that cater to both real-time and best-effort applications, i.e. mixed-time-criticality memory controllers. The authors describe the state of the art, and then focus on an architecture template for reconfigurable memory controllers that addresses effectively the quickly evolving set of SDRAM standards, in terms of worst-case timing and power analysis, as well as implementation. A prototype implementation of the controller in SystemC and synthesizable VHDL for an FPGA development board are used as a proof of concept of the architecture template
- Cataloging source
- N$T
- http://library.link/vocab/creatorName
- Goossens, Sven
- Dewey number
- 006.2/2
- Index
- no index present
- LC call number
- TK7895.E42
- Literary form
- non fiction
- Nature of contents
-
- dictionaries
- bibliography
- http://library.link/vocab/relatedWorkOrContributorDate
- 1977-
- http://library.link/vocab/relatedWorkOrContributorName
-
- Chandrasekar, Karthik
- Goossens, Kees
- Åkesson, Benny
- Series statement
- Embedded systems,
- http://library.link/vocab/subjectName
-
- Embedded computer systems
- Dynamic random access memory
- Programmable controllers
- Real-time data processing
- Label
- Memory controllers for mixed-time-criticality systems : architectures, methodologies and trade-offs, Sven Goossens, Karthik Chandrasekar, Benny Akesson, Kees Goossens, (electronic book)
- Antecedent source
- unknown
- Bibliography note
- Includes bibliographical references
- Carrier category
- online resource
- Carrier category code
-
- cr
- Carrier MARC source
- rdacarrier
- Color
- multicolored
- Content category
- text
- Content type code
-
- txt
- Content type MARC source
- rdacontent
- Contents
- Introduction -- Reconfigurable Real-Time Memory Controller Architecture -- Memory Patterns -- Cycle-Accurate SDRAM Power Modeling -- Power/Performance Trade-Offs -- Conservative Open-Page Policy -- Reconfiguration -- Related Work -- Conclusions and Future Work -- Appendix A: ILP Problem Formation -- Appendix B: Memory Specifications -- Appendix C: Code Listings -- Appendix D: List of Acronyms -- Appendix E: List of Symbols
- Control code
- SPR946724649
- Dimensions
- unknown
- Extent
- 1 online resource (xxvii, 202 pages)
- File format
- unknown
- Form of item
- online
- Isbn
- 9783319320939
- Level of compression
- unknown
- Media category
- computer
- Media MARC source
- rdamedia
- Media type code
-
- c
- Other control number
- 10.1007/978-3-319-32094-6
- Quality assurance targets
- not applicable
- Reformatting quality
- unknown
- Sound
- unknown sound
- Specific material designation
- remote
- Label
- Memory controllers for mixed-time-criticality systems : architectures, methodologies and trade-offs, Sven Goossens, Karthik Chandrasekar, Benny Akesson, Kees Goossens, (electronic book)
- Antecedent source
- unknown
- Bibliography note
- Includes bibliographical references
- Carrier category
- online resource
- Carrier category code
-
- cr
- Carrier MARC source
- rdacarrier
- Color
- multicolored
- Content category
- text
- Content type code
-
- txt
- Content type MARC source
- rdacontent
- Contents
- Introduction -- Reconfigurable Real-Time Memory Controller Architecture -- Memory Patterns -- Cycle-Accurate SDRAM Power Modeling -- Power/Performance Trade-Offs -- Conservative Open-Page Policy -- Reconfiguration -- Related Work -- Conclusions and Future Work -- Appendix A: ILP Problem Formation -- Appendix B: Memory Specifications -- Appendix C: Code Listings -- Appendix D: List of Acronyms -- Appendix E: List of Symbols
- Control code
- SPR946724649
- Dimensions
- unknown
- Extent
- 1 online resource (xxvii, 202 pages)
- File format
- unknown
- Form of item
- online
- Isbn
- 9783319320939
- Level of compression
- unknown
- Media category
- computer
- Media MARC source
- rdamedia
- Media type code
-
- c
- Other control number
- 10.1007/978-3-319-32094-6
- Quality assurance targets
- not applicable
- Reformatting quality
- unknown
- Sound
- unknown sound
- Specific material designation
- remote
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<div class="citation" vocab="http://schema.org/"><i class="fa fa-external-link-square fa-fw"></i> Data from <span resource="http://link.liverpool.ac.uk/portal/Memory-controllers-for-mixed-time-criticality/UG6LheJDidA/" typeof="Book http://bibfra.me/vocab/lite/Item"><span property="name http://bibfra.me/vocab/lite/label"><a href="http://link.liverpool.ac.uk/portal/Memory-controllers-for-mixed-time-criticality/UG6LheJDidA/">Memory controllers for mixed-time-criticality systems : architectures, methodologies and trade-offs, Sven Goossens, Karthik Chandrasekar, Benny Akesson, Kees Goossens, (electronic book)</a></span> - <span property="potentialAction" typeOf="OrganizeAction"><span property="agent" typeof="LibrarySystem http://library.link/vocab/LibrarySystem" resource="http://link.liverpool.ac.uk/"><span property="name http://bibfra.me/vocab/lite/label"><a property="url" href="http://link.liverpool.ac.uk/">University of Liverpool</a></span></span></span></span></div>